Brian Chen: Variations of SNMs in Sub-threshold Circuits

Brian Chen will be continuing his education as a 5th year studying Computer Engineering with a concentration in Digital Hardware. In the summer of 2012, Brian worked as an undergraduate researcher in Matthew Guthaus’ VLSI-DA lab through the NSF funded SURF-IT program. He will be continuing his research that he started in the program during his 5th year.

 

Brian’s focuses in the VLSI-DA lab are low-power and circuit reliability. Sub-threshold operation offers a compelling solution for ultra-low energy applications such as micro-sensors and embedded medical applications, where low energy needs are the primary concern instead of speed. By lowering the supply voltage below the transistors’ threshold voltage, we see a dramatic drop in energy consumption when compared to normal operations, but circuit instability and delay variability are increased in sub-threshold operation. Therefore, we must stabilize and mitigate the sensitivity to variation for optimal operation. Brian explored variability metrics and noise sensitivity of cascaded logic gates. By using a stability metric called Static Noise Margin, he was able to study the robustness of a circuit at reduced supply voltages. Through studying the downsides of sub-threshold operation, we can find ways to reduce these side effects. This can be a reliable solution for ultra-low energy applications.